France: Phd Position in Computer Science / Embedded Systems, ESTACA, Laval(53) France

Development methodology for distributed real-time embedded systems: application to automotive domain

The complexity of hardware architectures, the arrival of new functions and the growing size of embedded code are the actual challenges of automotive electronic. In a vehicle, all these aspects make the real-time distributed systems development harder. Traditional development techniques do not guarantee the interoperability between the software components, especially distribution constraints, integration and timing constraints. To face this problematic, the AUTOSAR (Automotive open system architecture) consortium regroups the main worldwide actors in automotive (manufacturers, suppliers, software publishers and electronic providers). This initiative aims to define an open standard for embedded architecture allowing the development of the emerging distributed functions and for the next vehicle generations. AUTOSAR allows developing, internally or externally, and deploying software components, middle-class or applied, on specified hardware architecture in an optimal manner. The approach also integrates Flexray, the new communication protocol, associating synchronous and asynchronous communication to answer the request of critical and determinist systems. The actual AUTOSAR model does not consider timing constraints in the development process, neither the dynamic resources management for non-critical functionalities of the system. The timing consideration will complete the AUTOSAR norm for a continuous deployment in automotive industry.

The objectives of the PhD are:

A model for the timing constraints at the specification phase of the AUTOSAR development process. The model will describe the software timing properties and their requirements on the architecture (period, precedence constraints, etc), on the system’s hardware topology (bandwidth, network topology, etc) and on the system deployment (task placement, communication resources allocation, task and message WCET, etc).
Methods of safety dependability assuring required safety level for critical software.
Scheduling strategy of tasks and messages exploiting the proposed model’s properties to optimise resources usage of the CPU (local scheduling) and of the network (global scheduling). The network considered in the PhD will be the Flexray bus and the real-time operating system will be compliant with the norm OSEK/VDX.
An experimentation of the model and the proposed methods, using an innovating function X-by-wire and the laboratory means: DSPACE benchmark, Vector tools, FlexRay systems, V850 board, etc.
The position is open until filled.

Contacts:
sebastien.saudrais[ at ]esatca[ dot]fr

patrick.leserf[ at ]esatca[ dot]fr

khaled.chaaban[ at ]esatca[ dot]fr

PhD location :
The PhD will take place at the embedded system laboratory of ESTACA in Laval (53), France with some moving to UTC of Compiègne for meetings with the PhD director.

Financing : ESTACA contract for 3 years.